I will be going to Semicon West from 9th to 11th July in Moscone here in San Francisco. Of course there are lots of interesting sessions but here are two that I think are especially important to get a good impression of the way things are going in the future from experts. The two most interesting questions about the future are what comes after 14nm, and is EUV ever going to work for volume manufacturing. These two sessions look at exactly these issues.
Dr Stan Krolikoski has been honored with the 2013 Leadership Award from Accellera Systems Initiative.
I think I first met Stan when I was running engineering at Compass Design Automation and we acquired CLSI Technology where he then worked. I think he is the only person I know who (a) has a PhD that is actually in philosophy and (b) has a second PhD as well, having discovered that a PhD in philosophy isn't quite the door opener to good jobs at somewhere like IBM. At the time he worked out of Rochester Minnesota and I discovered that despite living in Scotland for years there is a whole new level of cold that is possible.
But in fact Stan has been in the industry an pioneering standards for quarter of a century, from early days of VHDL, through the Open SystemC Inititative (OSCI) to ongoing work on IP rights policy.
So where in the world do you think semiconductor manufacturing is increasing the fastest? OK, Taiwan, that was pretty easy. But in second place, with over 20% of the world's semiconductor equipment capital investment is the US. Growing faster than Europe, China, Japan and equal with Korea.
This was not the case half a dozen years ago. Intel was building its first fab in China at Dalian. AMD was ramping Dresden (Germany). Most semiconductor companies were transitioning to fab-lite models with modern processes being manufactured in Asia, and old fabs being milked using non-leading-edge processes. It seemed inevitable that semiconductor manufacturing would mostly be outsourced just like most other manufacturing.
This year at DAC there was a new area of the show floor called Global Forum. For the first day of the show it was all blocked off with black curtains, but come 5pm the mayor of Austin, Lee Leffingwell, opened everything up, cutting the red ribbon with the largest pair of scissors I've ever seen.
In the Global Forum were representatives from a couple of dozen different countries that have a presence in EDA, semiconductors or electronics. A few of the pods were unmanned since people from those countries were unable to get a visa from the US in time to attend, but almost every pod was manned (or womanned) by someone from that country who was knowledgeable about what was going on in their home country. And it was not just the usual suspects like Taiwan, China or India. There were representatives from Peru, Morocco and Saudi Arabia, for example, not the first countries that spring to mind.
This year's Kaufman award winner is Chenming Hu. In contrast to previous years, this was presented on the Sunday evening of DAC instead of at a separate event in San Jose. Chenming's career was reviewed by Klaus Schuegraf, Group Vice President of EUV Product Development at Cymer, Inc (now part of ASML) and also one of the (many) students of Dr Hu.
One thing that I had no idea about was that Chenming had climbed Everest at the age of 50. That seems pretty much up there (see what I did) with inventing the FinFET. However, Dr Hu's career goes back a long way before the FinFET. He was instrumental in solving hot-electron problems back in the 1um (almost typed nm there, i'm so used to it) era. And then getting through the 3V scaling barrier.
As is now traditional, Gary Smith kicked off DAC proper (there were workshops earlier and some co-located conferences started days before). He started by dismissing the idea that it costs $170M to do an SoC design.
In fact he looked at 3 different cases. Firstly, the completely unconstrained design. Well, no design is completely unconstrained but for the main part of the market (mobile of one form or another) the power budget is 5W. EDA has actually done a good job of solving power problems and the mixture of tools and methodologies has cut power consumption dramatically. Nobody gets to have an unconstrained development schedule either, it is always 9-12 months max or you are out of business.
If you have $50M to spend, you get 5W (nobody gets more) which gives you 3M gates at 1.8GHz and the same 9-12 months to spend your $50M.