Officially the contest is the DAC 2012 routability placement contest. That is, it is actually a placement algorithm contest where the primary measurement criteria are how small the design is and how routable the design is. A secondary criterion was runtime. The algorithms were tested on some advanced industrial benchmarks (basically ASIC designs) with realistic process rules (metal 1-4 were 1X minimum width and spacing, M5-7 were 2X and M8-9 were 4X).
Initially there were 28 teams, 20 from academia and 8 non-academic. By April when preliminary submissions were made this was down to 11 and at the final submission in May down to 7, all academic, 5 from Asia and 2 from the US. These 7 were evaluated on 4 public benchmarks (that the teams had access to) and 6 hidden benchmarks that the teams had not seen prior to submission. So the final scores were a function of half-perimeter wire length (HPWL) * routability measure * runtime factor.
The prizes were presented by Patrick Groeneveld, this year's general chair.
3rd prize ($500) went to SimPLR from the University of Michigan at Ann Arbor. Myung-Chul Kim, Jin Hu, Igor Markov.
2nd prize ($800) went to Ripple from the Chinese University of Hong Kong. Xu He, Tao Huang, Wing-Kai Chow, Lam Ka Chun, Evangeline F.Y. Young.
And the winner ($1200) was NTUplace4 from National Taiwan University. Meng-Kai Hsu, Yao-Wen Chang.
The contest was administrated and judged by Natarajan Viswanathan of IBM corporation. The sponsors were CEDA, TSMC, Cadence and SigDA.